Safe Cflags/Intel
From Gentoo Linux Wiki
Warning: GCC 4.x and above support -march=native. -march=native applies additional settings beyond -march, specific to your CPU. Unless you have a specific reason not to (e.g. distcc cross-compiling), you should probably be using -march=native, rather than anything listed below.
[edit] Pentium
vendor_id : GenuineIntel cpu family : 5 model : 2 model name : Pentium 75 - 200
CHOST="i586-pc-linux-gnu"
CFLAGS="-march=pentium -O2 -pipe -fomit-frame-pointer"
CXXFLAGS="${CFLAGS}"
[edit] Pentium w/ MMX
CHOST="i586-pc-linux-gnu"
CFLAGS="-march=pentium-mmx -O2 -pipe -fomit-frame-pointer"
CXXFLAGS="${CFLAGS}"
[edit] Pentium Pro
CHOST="i686-pc-linux-gnu"
CFLAGS="-march=pentiumpro -O2 -pipe -fomit-frame-pointer"
CXXFLAGS="${CFLAGS}"
[edit] Pentium II
vendor_id : GenuineIntel cpu family : 6 model : 3, 5
CHOST="i686-pc-linux-gnu"
CFLAGS="-march=pentium2 -O2 -pipe -fomit-frame-pointer"
CXXFLAGS="${CFLAGS}"
processor : 0 vendor_id : GenuineIntel cpu family : 6 model : 6 model name : Mobile Pentium II stepping : 10 cpu MHz : 397.082 cache size : 256 KB fdiv_bug : no hlt_bug : no f00f_bug : no coma_bug : no fpu : yes fpu_exception : yes cpuid level : 2 wp : yes flags : fpu vme de pse tsc msr pae mce cx8 sep mtrr pge mca cmov pat pse36 mmx fxsr bogomips : 794.75 clflush size : 32
[edit] Celeron (Mendocino), aka Celeron1
vendor_id : GenuineIntel cpu family : 6 model : 6 stepping : 0
CHOST="i686-pc-linux-gnu"
CFLAGS="-march=pentium2 -O2 -pipe -fomit-frame-pointer"
CXXFLAGS="${CFLAGS}"
processor : 0 vendor_id : GenuineIntel cpu family : 6 model : 6 model name : Celeron (Mendocino) stepping : 0 cpu MHz : 334.108 cache size : 128 KB fdiv_bug : no hlt_bug : no f00f_bug : no coma_bug : no fpu : yes fpu_exception : yes cpuid level : 2 wp : yes flags : fpu vme de pse tsc msr pae mce cx8 sep mtrr pge mca cmov pat pse36 mmx fxsr up bogomips : 686.94 clflush size : 32
[edit] Pentium III/ Mobile Celeron
vendor_id : GenuineIntel cpu family : 6 model : 7, 8, 11
CHOST="i686-pc-linux-gnu"
CFLAGS="-march=pentium3 -O2 -pipe -fomit-frame-pointer"
CXXFLAGS="${CFLAGS}"
processor : 0 vendor_id : GenuineIntel cpu family : 6 model : 8 model name : Pentium III (Coppermine) stepping : 6 cpu MHz : 863.934 cache size : 256 KB fdiv_bug : no hlt_bug : no f00f_bug : no coma_bug : no fpu : yes fpu_exception : yes cpuid level : 2 wp : yes flags : fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 mmx fxsr sse bogomips : 1728.97 clflush size : 32
[edit] Celeron (Coppermine)
vendor_id : GenuineIntel cpu family : 6 model : 8 stepping : 10
CHOST="i686-pc-linux-gnu"
CFLAGS="-march=pentium3 -O2 -pipe -fomit-frame-pointer"
CXXFLAGS="${CFLAGS}"
[edit] Celeron (Willamette)
vendor_id : GenuineIntel cpu family : 15 model : 1 model name : Intel(R) Celeron(R) CPU 1.70GHz stepping : 3
CHOST="i686-pc-linux-gnu"
CFLAGS="-march=pentium4 -O2 -pipe -fomit-frame-pointer"
CXXFLAGS="${CFLAGS}"
[edit] Pentium M(Centrino)/Celeron M
vendor_id : GenuineIntel cpu family : 6 model : 9 or 13 model name : Intel(R) Pentium(R) M processor XXXXMHz
For gcc 3.3 or older:
CHOST="i686-pc-linux-gnu"
CFLAGS="-march=pentium3 -msse2 -O2 -pipe -fomit-frame-pointer"
CXXFLAGS="${CFLAGS}"
For gcc 3.4 and later:
CHOST="i686-pc-linux-gnu"
CFLAGS="-march=pentium-m -O2 -pipe -fomit-frame-pointer"
CXXFLAGS="${CFLAGS}"
The Celeron M is based on the Pentium M but it has half the L2 cache and does not support the SpeedStep technology.
processor : 0
vendor_id : GenuineIntel
cpu family : 6
model : 13
model name : Intel(R) Pentium(R) M processor 2.00GHz
stepping : 8
cpu MHz : 800.000
cache size : 2048 KB
fdiv_bug : no
hlt_bug : no
f00f_bug : no
coma_bug : no
fpu : yes
fpu_exception : yes
cpuid level : 2
wp : yes
flags : fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov
pat clflush dts acpi mmx fxsr sse sse2 ss tm pbe nx up bts est tm2
bogomips : 1597.70
clflush size : 64
[edit] Mobile Pentium 4-M (Northwood)
vendor_id : GenuineIntel cpu family : 15 model : 2 model name : Mobile Intel(R) Pentium(R) 4 - M CPU X.XXGHz
CHOST="i686-pc-linux-gnu"
CFLAGS="-march=pentium4 -O2 -pipe -fomit-frame-pointer"
CXXFLAGS="${CFLAGS}"
[edit] Pentium 4
vendor_id : GenuineIntel cpu family : 15 model : 0 or 1 or 2 model name : Intel(R) Pentium(R) 4 CPU XXXXMHz
CHOST="i686-pc-linux-gnu"
CFLAGS="-march=pentium4 -O2 -pipe -fomit-frame-pointer"
CXXFLAGS="${CFLAGS}"
[edit] Pentium 4 (Prescott) / Celeron D
vendor_id : GenuineIntel cpu family : 15 model : 3 or 4 model name : Intel(R) Pentium(R) 4 CPU XXXGHz -or- Intel(R) Celeron(R) CPU XXXGHz
32-bit profile (x86):
CHOST="i686-pc-linux-gnu"
CFLAGS="-march=prescott -O2 -pipe -fomit-frame-pointer"
CXXFLAGS="${CFLAGS}"
64-bit profile (amd64):
CHOST="x86_64-pc-linux-gnu"
CFLAGS="-march=nocona -O2 -pipe -fomit-frame-pointer"
CXXFLAGS="${CFLAGS}"
Note: You can verify the chip is a Prescott by looking for pni in the flags section of /proc/cpuinfo. This indicates support for SSE3.
In 2004, Intel started branding processors with the Prescott core as Intel Celeron D.
[edit] Pentium D 8xx / 9xx
vendor_id : GenuineIntel cpu family : 15 model : 4, 6 model name : Intel(R) Pentium(R) D CPU x.xxGHz
32-bit profile (x86):
CHOST="i686-pc-linux-gnu"
CFLAGS="-march=prescott -O2 -pipe -fomit-frame-pointer"
CXXFLAGS="${CFLAGS}"
64-bit profile (amd64):
CHOST="x86_64-pc-linux-gnu"
CFLAGS="-march=nocona -O2 -pipe -fomit-frame-pointer"
CXXFLAGS="${CFLAGS}"
[edit] Xeon w/o EM64T
vendor_id : GenuineIntel cpu family : 15 model : 2 model name : Intel(R) Xeon(TM) CPU 2.80GHz
CHOST="i686-pc-linux-gnu"
CFLAGS="-march=pentium4 -O2 -pipe -fomit-frame-pointer"
CXXFLAGS="${CFLAGS}"
[edit] Xeon w/EM64T (also Pentium 4 P6xx or Celeron M 5xx)
vendor_id : GenuineIntel cpu family : 15 model : 4,6 model name : Intel(R) Xeon(R) CPU XXXXMHz model name : Intel(R) Celeron(R) M CPU 5xx @ XXXGHz
32-bit profile (x86):
CHOST="i686-pc-linux-gnu"
CFLAGS="-march=prescott -O2 -pipe -fomit-frame-pointer"
CXXFLAGS="${CFLAGS}"
64-bit profile (amd64):
CHOST="x86_64-pc-linux-gnu"
CFLAGS="-march=nocona -O2 -pipe -fomit-frame-pointer"
CXXFLAGS="${CFLAGS}"
[edit] Intel Core Solo/Duo, Pentium Dual-Core T20xx/T21xx
vendor_id : GenuineIntel cpu family : 6 model : 14, 22 model name : Genuine Intel(R) CPU TXXXX @ XXXGHz model name : Intel(R) Celeron(R) CPU 220 @ 1.20GHz model name : Intel(R) Celeron(R) CPU 4X0 @ XXXGHz model name : Intel(R) Celeron(R) M CPU 4X0 @ XXXGHz
CHOST="i686-pc-linux-gnu"
CFLAGS="-march=prescott -O2 -pipe -fomit-frame-pointer"
CXXFLAGS="${CFLAGS}"
Notes:
- It has been confirmed by hongjiu.lu@intel.com that prescott is the correct microarchitecture to use with this CPU. http://article.gmane.org/gmane.comp.gcc.devel/83870
- The newer (eg. 420) Celeron-M processors are Core Solo based, not Pentium-M based. If your processor's family and model are 6 and 14, then you should use the -march=prescott option.
- Both the Celeron 4x0 and 220 run fine with Processor family (Pentium M) selected in the kernel.
[edit] Core 2 Duo/Quad, Xeon 51xx/53xx/54xx, Pentium Dual-Core T23xx+/Exxxx, Celeron Dual-Core
vendor_id : GenuineIntel cpu family : 6 model : 15 model name : Intel(R) Core(TM)2 CPU XXXX @ XXXGHz
32 bit profile (x86):
CHOST="i686-pc-linux-gnu"
CFLAGS="-march=prescott -O2 -pipe -fomit-frame-pointer"
CXXFLAGS="${CFLAGS}"
64 bit profile (amd64):
CHOST="x86_64-pc-linux-gnu"
CFLAGS="-march=nocona -O2 -pipe"
CXXFLAGS="${CFLAGS}"
32 bit Gentoo FreeBSD:
CHOST="i686-gentoo-freebsd6.2" CFLAGS="-march=prescott -O2 -pipe -fomit-frame-pointer" CXXFLAGS="$CFLAGS"
Note: If you are using >GCC 4.3.2-r3 or higher, you can use the -march=core2 flag with your Intel Core2 Processor. (See the change log). If you have a "penryn" model you can use the -msse4.1 flag to pull in sse 4.1 optimizations (check for sse4_1 in /proc/cpuinfo)
[edit] Core i7
vendor_id : GenuineIntel cpu family : 6 model : 26 model name : Intel(R) Core(TM) i7 CPU 920 @ 2.67GHz
32 bit profile (x86) - for <sys-devel/gcc-4.3:
CHOST="i686-pc-linux-gnu"
CFLAGS="-O2 -pipe -march=nocona -msse3 -fomit-frame-pointer"
CXXFLAGS="${CFLAGS}"
32 bit profile (x86) - for >=sys-devel/gcc-4.3:
CHOST="i686-pc-linux-gnu"
CFLAGS="-O2 -pipe -march=core2 -msse4 -mcx16 -msahf -fomit-frame-pointer"
CXXFLAGS="${CFLAGS}"
64 bit profile (amd64) - for <sys-devel/gcc-4.3
CHOST="x86_64-pc-linux-gnu"
CFLAGS="-march=nocona -O2 -mssse3 -pipe"
CXXFLAGS="${CFLAGS}"
64 bit profile (amd64) - for >=sys-devel/gcc-4.3
CHOST="x86_64-pc-linux-gnu"
CFLAGS="-march=core2 -msse4 -mcx16 -msahf -O2 -pipe"
CXXFLAGS="${CFLAGS}"
Note: If you are using the -msse4 option, then there is no need to add -msse4.1 or -msse4.2. They are implied by -msse4.
[edit] Atom
An Intel engineer put a guide on stable CFLAGS for the Atom procesor.
In summary, it is stated that these are the "suggested" CFLAGS:
-O1 -msse3 -march=core2 -mfpmath=sse -pipe -fstrength-reduce -fexpensive-optimizations -finline-functions -funroll-loops -foptimize-register-move
Note: : if you read the linked article, these flags are tested/suggested for a single, very specific app, and look like they were generated by Acovea. They are therefore almost certainly bad for general use as the purpose of Acovea is to exhaustively test flags for a single app only. He lists the generic flags elsewhere in the article, as listed below:
-O2 -msse3 -march=core2 -mfpmath=sse
[edit] Atom 230
vendor_id : GenuineIntel cpu family : 6 model : 28 model name : Intel(R) Atom(TM) CPU 230 @ 1.60GHz stepping : 2 cpu MHz : 1596.175 cache size : 512 KB
32 bit profile (x86):
CHOST="i686-pc-linux-gnu"
CFLAGS="-march=prescott -O2 -pipe -fomit-frame-pointer"
CXXFLAGS="${CFLAGS}"
64 bit profile (amd64):
CHOST="x86_64-pc-linux-gnu"
CFLAGS="-march=nocona -O2 -pipe"
CXXFLAGS="${CFLAGS}"
[edit] Atom N270/N280
For GCC versions prior to 4.3:
CHOST="i686-pc-linux-gnu"
CFLAGS="-march=prescott -O2 -pipe -fomit-frame-pointer"
CXXFLAGS="${CFLAGS}"
For GCC versions post and including 4.3:
Note: These CFLAGS set GCC to generate code for Intel Core processor family, but with generic instruction tuning suitable for the Atom's in-order execution engine. Atom supports sse1,2,3,3s instruction sets, so we should add flag -mssse3 (otherwise, the generic optimizations will disable it). More importantly, set the math floating point unit to "sse", otherwise it will default to the exceedingly slow 386 math co-processor instruction set. This brings a 20x speed increase in floating point calculations, as reported by app-benchmarks/bashmark. The -fomit-frame-pointer is optional. If you're using the machine for debugging, you do not want to enable this flag.
CHOST="i686-pc-linux-gnu"
CFLAGS="-O2 -march=core2 -mtune=generic -mssse3 -mfpmath=sse
-fomit-frame-pointer -pipe"
CXXFLAGS="${CFLAGS}"
[edit] Atom 330
32 bit profile (x86):
CHOST="i686-pc-linux-gnu"
CFLAGS="-march=prescott -O2 -pipe -fomit-frame-pointer"
CXXFLAGS="${CFLAGS}"
MAKEOPTS="-j5"
64 bit profile (amd64):
CHOST="x86_64-pc-linux-gnu"
CFLAGS="-march=nocona -O2 -pipe"
CXXFLAGS="${CFLAGS}"
MAKEOPTS="-j5"
64 bit profile (amd64) & GCC 4.3.2, core2 gives ~15% more performance & yields stable builds.
CFLAGS="-march=core2 -O2 -pipe"
[edit] Atom Z520/Z530
32 bit profile (x86):
CHOST="i686-pc-linux-gnu"
CFLAGS="-O2 -march=core2 -mtune=generic -fomit-frame-pointer -pipe"
CXXFLAGS="${CFLAGS}"
For GCC versions post and including 4.3:
Note: These CFLAGS set GCC to generate code for Intel Core processor family, but with generic instruction tuning suitable for the Atom's in-order execution engine. Atom supports sse1,2,3,3s instruction sets, so we should add flag -mssse3 (otherwise, the generic optimizations will disable it). More importantly, set the math floating point unit to "sse", otherwise it will default to the exceedingly slow 386 math co-processor instruction set. This brings a 20x speed increase in floating point calculations, as reported by app-benchmarks/bashmark. The -fomit-frame-pointer is optional. If you're using the machine for debugging, you do not want to enable this flag.
32 bit profile (x86):
CHOST="i686-pc-linux-gnu"
CFLAGS="-O2 -march=core2 -mtune=generic -fomit-frame-pointer -pipe -mssse3 -mfpmath=sse"
CXXFLAGS="${CFLAGS}"
